1. Field of the Invention
This invention pertains generally to an image sensor for converting an optical image into electrical signals and particularly to an image sensor having pixel-level signal amplification and analog-to-digital conversion.
2. Background of the Invention
An image sensor is used to convert an optical image focused on the sensor into electrical signals. The image sensor typically includes an array of light detecting elements, where each element produces a signal corresponding to the intensity of light impinging on that element when an image is focused on the array. These signals may then be used, for example, to display a corresponding image on a monitor or otherwise used to provide information about the optical image.
One goal of an image sensor is to provide the greatest possible dynamic range. Dynamic range specifies, in general, the ratio of the maximum to minimum intensity of light which the image sensor can detect. Dynamic range is typically expressed in decibels (dB), but may also be specified as the bits of precision available from the image sensor where the lowest and highest binary values represented by the bits respectively indicate the dimmest and brightest detectable light and intermediate values correspond to gradations therebetween. An image sensor having a wide dynamic range, for example, can accurately image a scene having widely varying light conditions without suffering from saturation or other sensing defects.
One very common type of image sensor is a charge coupled device (xe2x80x9cCCDxe2x80x9d). A CCD is typically an array of closely spaced metal-oxide semiconductor (xe2x80x9cMOSxe2x80x9d) capacitors and photodiodes on a solid-state surface. Each photodiode is referred to as a photosite and passes charge in response to the incident light intensity.
For example, FIG. 1 is a block diagram illustrating a prior art CCD image sensor 100. Illustrated are a two-dimensional array of image sensors 110, of which sensor 112 is exemplary. Each vertical array of sensors, of which array 113 is exemplary, is coupled to an input of a vertical CCD shift register, of which shift register 114 is exemplary. The output of each vertical CCD shift register 114 is coupled to an input of a horizontal CCD shift register 116. The output of the horizontal CCD shift register 116 is coupled to an amplifier 118, the output of which is coupled to the input of an analog-to-digital (xe2x80x9cA/Dxe2x80x9d) converter 120.
In use, the electric charge of the image sensors 112 in the vertical arrays 113 are shifted in parallel into the respective vertical CCD shift registers 114. Then, one charge packet from each vertical CCD shift register 114 is shifted into the horizontal CCD shift register 116. The charge packets in the horizontal CCD shift register 116 are shifted out one at a time, converted from a charge into a voltage by the amplifier 118, and converted into a series of digital bits by the A/D converter 120.
The dynamic range of a CCD-based image sensor is typically in the range of 8-14 bits. Due to the shared pixel signal path and the off-chip A/D converter 120, it is difficult to further expand the dynamic range of a CCD-based image sensor. In addition, the image signal is susceptible to noise and distortion due to the long analog signal path. Moreover, CCD technology is a relatively small market and has not fully benefited from mass production cost reductions.
Partly in response to the problems with CCD-based image detectors described above, there has recently been renewed interest in complementary-metal-oxide semiconductor (xe2x80x9cCMOSxe2x80x9d)-based imaging. In a CMOS-type image sensor, a photodiode or phototransistor (or other suitable device) is used as the light detecting element, where the conductivity of the element corresponds to the intensity of light impinging on the element. The variable signal thus generated by the light detecting element is an analog signal having a magnitude approximately proportional (within a certain range) to the amount of light impinging on the pixel. CMOS image sensors are formed as an integrated circuit and are generally much less expensive than CCDs.
FIG. 2 is a block diagram illustrating a prior art CMOS image sensor 200. Illustrated is a two-dimensional array of pixel image sensors 210, of which sensor 212 is exemplary. Each image sensor 212 is coupled to an input of a fixed-gain amplifier, of which amplifier 214 is exemplary. The fixed-gain amplifier 214 provides a minimal amount of amplification and primarily acts as a buffer. The output of the fixed gain amplifier 214 is passed through a switch, such as switch 216, and input to an analog multiplexer (xe2x80x9cMUXxe2x80x9d) 218. The outputs of the switches in each vertical array, such as array 221, are coupled to the same input line of the MUX 218 and a row decoder 217 is coupled to each horizontal array of switches, such as array 219. The selected input to the MUX 218 is passed to an output amplifier 220. The output of the output amplifier 220 is passed to an A/D converter 222.
In use, the outputs of the row decoder 217 selectively enable a horizontal array 219 of switches 216, causing the output voltages of the fixed-gain amplifiers 214 in the array 219 to be passed to the inputs of the analog MUX 218. The MUX 218 selectively passes the input voltages to the output amplifier 220 and the A/D converter 222.
However, for large pixel arrays, the analog signals generated by each light detecting element are subject to varying degrees of parasitic effects such as those caused by parasitic capacitances and resistances. These parasitic effects are difficult to control and result in degradation of the signal-to-noise ratio of the image information. Moreover, CMOS-based image sensors typically provide less dynamic range than do CCD-based sensors.
To this end, CMOS-based image sensors such as that disclosed in U.S. Pat. No. 5,461,425 (the xe2x80x9c""425 patentxe2x80x9d) by an inventor of the present invention, which is hereby incorporated by reference herein, have been developed. The CMOS image sensor in the ""425 patent resembles that shown in FIG. 2, except that the image sensor of the ""425 patent has an A/D converter at each pixel, thereby alleviating the analog parasitic effects of other CMOS image sensor designs.
However, even the CMOS image sensor in the ""425 patent provides only eight bits of dynamic range. Accordingly, there is a need in the art for a CMOS-based image sensor providing a greater dynamic range than existing image sensors.
The above needs are met by an image sensor and method of sensing an image that provides a variable amplifier at each pixel. By individually and variably amplifying the signals from the pixels, one embodiment of the present invention provides 17 bits of dynamic range.
A preferred embodiment of the present invention comprises an image sensor core (500) of a computer chip manufactured using a complementary-metal-oxide-semiconductor (xe2x80x9cCMOSxe2x80x9d) process. The image sensor core comprises an array of image sensing elements (510). Each element includes a photon detector (310), also referred to as a photodetector, a variable amplifier (312), and an analog-to-digital (xe2x80x9cA/Dxe2x80x9d) converter (314).
The photon detector (310) is a photosensitive element such as a photodiode and generates photocharge in response to light impinging on the detector (310). The photocharge is amplified by the variable amplifier (312). In one embodiment of the present invention, the amount of amplification provided by the variable amplifier (312) is controllably selected from up to 32 amplification levels by a 5-bit control signal.
The voltage output by the amplifier (312) is provided to the A/D converter (314), which generates a digital value describing the photocurrent. In one embodiment of the present invention, the A/D converter (314) generates a 12-bit value, which is then stored in a memory. Together, the 5-bit amplification level and 12-bit value describe the light impinging on the detector (310) with 17 bits of dynamic range.
The A/D converter (314) preferably comprises a comparator (512) coupled to a 17-bit latch/shift register (514). The comparator (512) receives the output of the variable amplifier (312) and a monotonic ramp signal and has an output coupled to the latch/shift register (514). The latch/shift register (514) receives a 12-bit count signal synchronized to the ramp signal and has a parallel output coupling the five most significant bits of the shift register (514) to the variable amplifier (312) and a serial output through which all 17 bits can be shifted. When the comparator (512) determines that the ramp signal has exceeded the output of the variable amplifier (312), the comparator (512) triggers the latch/shift register (514) and causes the latch/shift register (514) to latch the count signal. The count signal is controllably latched in either the five most significant bits or the 12 least significant bits of the shift register (514). The five most significant bits latched into the shift register (514) form the control signal for the variable amplifier (312).
The present invention preferably uses a two phase method to provide 17 bits of dynamic range. During the first phase, the photosensitive element (310) is exposed to light for a first integration period. In a preferred embodiment of the present invention, the first integration period is {fraction (1/32)}nd of the normal integration period. The variable amplifier (312) amplifies the resulting photocharge at the maximum amplification setting. Then, the amplified photocurrent is converted from analog to digital by the A/D converter (314). During the conversion, the ramp signal is increased 32 times faster than normal and the five most significant bits of the count signal are latched into the five most significant bits of the 17-bit latch/shift register (514).
During the second phase, the photosensitive element (310) is exposed to light for the normal integration period. Then, the variable amplifier (312) amplifies the resulting photocharge by an amount determined from the five bits latched into the latch/shift register (514). The resulting photocurrent is passed to the A/D converter (314) and the corresponding 12-bit count signal is latched in the 12 least significant bits of the latch/shift register (514).
At the end of the second phase, the entire 17-bit content of the latch/shift register (514) can be serially shifted out. The five most significant bits describe the exponent and the 12 least significant bits describe the mantissa of the digital value corresponding to the intensity of light impinging on the sensor element during the integration period. Accordingly, the dynamic range of the image sensor according to the present invention has 17 bits of precision.